KSJ EtherCAT Master based on Xilinx FPGA

KSJ EtherCAT master stack is developed for the purpose of industrial embedded systems. This master stack works only on FPGA area, and support ETG1500.classB standard, DC function. For fast cyclic master stack, PDO processing is designed in FPGA area. Initialization and CoE communication is done on microblaze processor in FPGA. API and driver can be provided by KSJ for user CPU.

KSJ original LZ201 master board equipped with Xilinx Zynq SoC is helpful for evaluation. When this master stack using LZ201 board can achieved 20 μsec cyclic PDO communication, and about 30 nsec jitter with 3 slaves which has 32bit data for each.